struppi/rgbyteclock-code
1
0
Fork 0
Code Issues Pull Requests Releases Wiki Activity

test leds works already

Browse Source
This commit is contained in:
Stefan Rupp 2014-03-12 17:07:18 +01:00
parent 39ac2613bb
commit fe3055f15a
3 changed files with 25 additions and 13 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

16
main.c
View File

@ -17,17 +17,27 @@
#include "spi.h"
#include "ledcontroller.h"
#include "rtc.h"
#include <util/delay.h>
int main(void)
{
timer_init();
rtc_init(0);
spi_slave_init();
//rtc_init(0);
//spi_slave_init();
ledcontroller_init();
sei();
lcd_init();
//lcd_init();
DDRC |= (1<<PC5);
/*
while (1) {
PORTC ^= (1<<PC5);
timer_wait(5000);
//_delay_ms(100);
}
*/
rgbyteclock();
// rgbyteclock() should never end, but who knows...
while (1) { ; }

13
rgbyteclock.c
View File

@ -21,38 +21,39 @@ void rgbyteclock(void)
{
while(1) {
PORTC ^= (1<<PC5);
for (int i=0; i<15; i++) {
led_set(i, 0x7ff, 0x00, 0x00);
led_flush();
timer_wait(200);
timer_wait(2000);
}
for (int i=0; i<15; i++) {
led_set(i, 0x00, 0x00, 0x00);
}
led_flush();
timer_wait(100);
timer_wait(1000);
for (int i=0; i<15; i++) {
led_set(i, 0x00, 0x7ff, 0x00);
led_flush();
timer_wait(200);
timer_wait(2000);
}
for (int i=0; i<15; i++) {
led_set(i, 0x00, 0x00, 0x00);
}
led_flush();
timer_wait(100);
timer_wait(1000);
for (int i=0; i<15; i++) {
led_set(i, 0x00, 0x00, 0x7ff);
led_flush();
timer_wait(200);
timer_wait(2000);
}
for (int i=0; i<15; i++) {
led_set(i, 0x00, 0x00, 0x00);
}
led_flush();
timer_wait(100);
timer_wait(1000);
}

9
timer.c
View File

@ -32,6 +32,7 @@ ISR(TIMER0_COMPA_vect) {
void timer_init(void)
{
uint8_t sreg = SREG;
// Stop all interrupts
cli();
@ -42,16 +43,16 @@ void timer_init(void)
// - Time accuracy: 1 millisecond (corresponding frequency: 1kHz)
// ==> F_CPU = 20Mhz
// ==> 20Mhz / 256 = 78.125 kHz
// ==> let timer count to 78 to get (almost) 1kHz frequency
// ==> let timer count to 77 to get (almost) 1kHz frequency
// therefore:
// - Set Timer/Counter0 prescaler to 256 ==> (1<<CS02)
// - Set OCR2 to 78
// - Set OCR2 to 77
// - CTC ( i.e. clear counter, when COUNTER == OCR0A) ==> (1<<WGM01)
// unfortunately, due to the 20MHz and the coarse prescaler dividers
// provided, we can't get any closer to the desired frequency of
// 1kHz :(
OCR0A = 78;
TCCR0B = (1<<WGM02);
OCR0A = 77;
TCCR0B = (1<<WGM01);
TCCR0A = (1<<CS02);
// Interrupts setzen