From bb36d903d0b3ed9df8bffcb1017a1ccc05149fe1 Mon Sep 17 00:00:00 2001
From: Stefan Rupp <struppi@struppi.name>
Date: Sat, 1 Mar 2014 18:11:34 +0100
Subject: [PATCH] change spi pins for atmega164a

---
 spi.c | 20 +++++++++-----------
 1 file changed, 9 insertions(+), 11 deletions(-)

diff --git a/spi.c b/spi.c
index 8ed979a..845c892 100644
--- a/spi.c
+++ b/spi.c
@@ -41,8 +41,8 @@ static struct spi_comm_t spi_comm;
 
 static inline void set_ack_miso(uint8_t ack)
 {
-  if (ack) PORTC |= (1<<PC7);
-  else PORTC &= ~(1<<PC7);
+  if (ack) PORTC |= (1<<PC3);
+  else PORTC &= ~(1<<PC3);
 }
 
 
@@ -96,7 +96,7 @@ ISR(PCINT1_vect)
 {
   uint8_t tx_obj, rx_obj;
 
-  if (PINC & (1<<PC1)) {
+  if (PINB & (1<<PB4)) {
     // rising edge
     if ( spi_comm.rxin_buf[0] != SPI_COMM_PADDING ) {
       uint8_t len = spi_comm.rxin_buf[0];
@@ -150,20 +150,20 @@ int8_t spi_slave_init()
     ringbuf_put_nb(rbuff_unused, i);
   }
   
-  PCMSK1 |= (1<<PCINT9);
+  PCMSK1 |= (1<<PCINT12);
   PCICR  |= (1<<PCIE1);
   
   /* Set MISO output, all others input */
-  DDRD |= (1<<PD2);
-  DDRD &= ~((1<<PD3)|(1<<PD4));
+  DDRB |= (1<<PB6);
+  DDRB &= ~((1<<PB7)|(1<<PB5)|(1<<PB4));
   /* Enable SPI */
   
   SPCR = (1<<SPE) | (1<<SPIE);	// enable SPI
   
-  DDRB &= ~(1<<PB5);  // ACK_MOSI
-  PORTB &= ~(1<<PB5);
+  DDRC &= ~(1<<PC4);  // ACK_MOSI
+  PORTC &= ~(1<<PC4);
   
-  DDRC |= (1<<PC7); // ACK_MISO
+  DDRC |= (1<<PC3); // ACK_MISO
   set_ack_miso(0);
   
   return 1;
@@ -186,7 +186,6 @@ int8_t spi_prepare_to_send(void *data)
     }
     else {
       return -tx_object;
-      //PORTB ^= (1<<PB3);
     }
   }
   else {
@@ -206,7 +205,6 @@ int8_t spi_receive(void *data)
     }
     else {
       return (-rx_object);
-      //PORTB ^= (1<<PB3);
     }
   }
   else {