struppi/rgbyteclock-code
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merge default into patterns

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This commit is contained in:
Stefan Rupp 2014-03-18 01:22:12 +01:00
commit ab9eef310c
4 changed files with 32 additions and 38 deletions
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2
Makefile
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@ -29,7 +29,7 @@ rgbyteclock_patterns.o: timer.o lcd.o rgbyteclock_patterns.h rtc.o spi.o ledcont
rgbyteclock.o: rgbyteclock_patterns.o
main.o: rgbyteclock.o lcd.o spi.o ledcontroller.o rtc.o timer.o
ledcontroller.o: led1642gw.o
led1642gw.o: led1642gw.h
led1642gw.o: led1642gw.h led1642gw_config.h
timer.o: timer.h
lcd.o: lcd.h timer.o
rtc.o: rtc.h

38
led1642gw.c
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@ -15,65 +15,37 @@
#include "led1642gw.h"
#include <util/delay.h>
#include "led1642gw_config.h"
#define NUM_LED1642GW_CHANNELS (16)
#define NUM_LED_CHANNELS (NUM_LED1642GW_CHANNELS*NUM_LED1642GW_ICs)
#define NUM_LED1642GW_ICs (3)
static uint16_t ledbuffer[NUM_LED_CHANNELS];
#define DDR_CLK (DDRC)
#define PORT_CLK (PORTC)
#define PIN_CLK (3)
#define SET_CLK_H() ((PORT_CLK) |= (1<<(PIN_CLK)))
#define SET_CLK_L() ((PORT_CLK) &= ~(1<<(PIN_CLK)))
#define DDR_SDI (DDRC)
#define PORT_SDI (PORTC)
#define PIN_SDI (4)
#define SET_SDI_H() ((PORT_SDI) |= (1<<(PIN_SDI)))
#define SET_SDI_L() ((PORT_SDI) &= ~(1<<(PIN_SDI)))
#define DDR_LE (DDRC)
#define PORT_LE (PORTC)
#define PIN_LE (2)
#define SET_LE_H() ((PORT_LE) |= (1<<(PIN_LE)))
#define SET_LE_L() ((PORT_LE) &= ~(1<<(PIN_LE)))
static void write_data(uint16_t data, uint8_t le_clocks)
{
uint16_t mask = 0x8000;
int8_t bit;
//PORTC &= ~(1<<PC2);
SET_LE_L();
for (bit=15; bit>=le_clocks; bit--) {
//PORTC &= ~(1<<PC3);
SET_CLK_L();
if(data&mask) { SET_SDI_H(); }
else { SET_SDI_L(); }
//PORTC |= (1<<PC3);
SET_CLK_H();
mask >>= 1;
}
//PORTC |= (1<<PC2);
SET_LE_H();
for (/*noting to initialize*/; bit>=0; bit--) {
//PORTC &= ~(1<<PC3);
SET_CLK_L();
if(data&mask) { SET_SDI_H(); }
else { SET_SDI_L(); }
//PORTC |= (1<<PC3);
SET_CLK_H();
mask >>= 1;
}
//PORTC &= ~(1<<PC3);
SET_CLK_L();
//PORTC &= ~(1<<PC2);
SET_LE_L();
//PORTC &= ~(1<<PC4);
SET_SDI_L();
}
@ -122,17 +94,11 @@ void led1642gw_turn_all_off(void)
void led1642gw_init(void)
{
//PORTC &= ~(1<<PC3); // SCK
SET_CLK_L();
//PORTC &= ~(1<<PC4); // DATA
SET_SDI_L();
//PORTC &= ~(1<<PC2); // LE
SET_LE_L();
//DDRC |= (1<<PC3); // SCK
DDR_CLK |= (1<<PIN_CLK);
//DDRC |= (1<<PC4); // DATA
DDR_SDI |= (1<<PIN_SDI);
//DDRC |= (1<<PC2); // LE
DDR_LE |= (1<<PIN_LE);
memset(ledbuffer, 0x00, sizeof(ledbuffer));
led1642gw_flush();

28
led1642gw_config.h Normal file
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@ -0,0 +1,28 @@
#ifndef LED1642GW_CONFIG_H_
#define LED1642GW_CONFIG_H_
#define NUM_LED1642GW_ICs (3)
#define DDR_CLK (DDRC)
#define PORT_CLK (PORTC)
#define PIN_CLK (3)
#define SET_CLK_H() ((PORT_CLK) |= (1<<(PIN_CLK)))
#define SET_CLK_L() ((PORT_CLK) &= ~(1<<(PIN_CLK)))
#define DDR_SDI (DDRC)
#define PORT_SDI (PORTC)
#define PIN_SDI (4)
#define SET_SDI_H() ((PORT_SDI) |= (1<<(PIN_SDI)))
#define SET_SDI_L() ((PORT_SDI) &= ~(1<<(PIN_SDI)))
#define DDR_LE (DDRC)
#define PORT_LE (PORTC)
#define PIN_LE (2)
#define SET_LE_H() ((PORT_LE) |= (1<<(PIN_LE)))
#define SET_LE_L() ((PORT_LE) &= ~(1<<(PIN_LE)))
#endif // LED1642GW_CONFIG_H_

2
rgbyteclock.c
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@ -5,7 +5,7 @@
void rgbyteclock(void)
{
rgbyteclock_rounds_colored();
rgbyteclock_rounds();
while (1) {