diff --git a/timer.c b/timer.c
index 48d7b11..ec7919a 100644
--- a/timer.c
+++ b/timer.c
@@ -19,6 +19,7 @@
  */
 static volatile uint32_t _timer_time;
 
+
 ISR(TIMER0_COMPA_vect) {
   ++_timer_time;
   return;
@@ -46,7 +47,7 @@ void timer_init(void)
   // ==> let timer count to 77 to get (almost) 1kHz frequency
   // therefore:
   // - Set Timer/Counter0 prescaler to 256 ==> (1<<CS02)
-  // - Set OCR2 to 77
+  // - Set OCR0 to 77
   // - CTC ( i.e. clear counter, when COUNTER == OCR0A) ==> (1<<WGM01)
   // unfortunately, due to the 20MHz and the coarse prescaler dividers
   // provided, we can't get any closer to the desired frequency of